Explore projects

parse the file generated by "-d nochain,cpu -D dump.log"

Connect to H2 database, execute SQL and convert result to json

RISC-V Operating System

A domain specific language to change the value of VCD, supporting the development of our RISC-V core.

Makefile supports for Netbeans

Run bat by clicking the menu

Visualize the verilog code

Our OpenLane repo for RISC-V cpu

A modified version of libsigrok to support our logic analyzer

OpenOCD fork to support Quantr-I RISC-V cpu