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RISC-V kernel development

Plugin for VSCode to view vcd file produced by gtkwave

Display waveform from vcd file in wordpress https://quantr.foundation/vcd

Build by antlr

https://www.quantr.foundation/arduino-testbench/

parse the file generated by "-d nochain,cpu -D dump.log"

Connect to H2 database, execute SQL and convert result to json

RISC-V Operating System

A domain specific language to change the value of VCD, supporting the development of our RISC-V core.

Makefile supports for Netbeans

Run bat by clicking the menu

Visualize the verilog code